Understanding and improving the energy efficiency of DRAM
Abstract/Contents
- Abstract
- Human created data has been growing exponentially for decades and there are many reports stating 90% of all data were created in the past couple of years [1]. Moreover, this exceptionally high data growth rate is predicted to continue in the future. Increased data volume then drives storage capacity growth, and also places high demands on high bandwidth and large capacity DRAM [2]. However, growing capacity and memory performing also grows memory power making DRAM power consumption one of the most important component to optimize in power limited modern computer systems. This power issue led to the development of specialized DRAMs, such as Low Power Double Data Rate (LPDDR) and High Bandwidth Memory (HBM), that are much more energy efficient than conventional DDR DRAM. While minimizing memory power is a popular research topic, the DRAM design space is highly constrained by the heavy cost-per-bit optimization done in DRAM. Surprisingly, these constraints are difficult to find as those information are known only within the small community of DRAM circuit designers. To address this issue, we worked with former and current DRAM designers to build an open-sourced DRAM modeling framework named DramDSE, short for DRAM Design Space Exploration. The modeling framework incorporates crucial design constraints posed by modern DRAM and provides the area, detailed power breakdown, and current values that are needed to explore the design space of DRAM efficiently. We used DramDSE to create the first public domain models of two state-of-the-art DRAMs, LPDDR4 and HBM, for the first time in public domain and validated the correctness of our model using measured data collected from mass-produced LPDDR4 and HBM DRAMs. With a better understanding of DRAM gained from DramDSE, we propose three DRAM energy reduction schemes. The first two are built on top of a unique cell array design that can access only half of the page. Half Page DRAM reduces the row energy due to the row buffer overfetch problem in multi-core systems, which yields 38% row energy savings without any bandwidth loss. Charge Recycling Refresh reduces up to 32% of refresh energy by recycling charges from fully refreshed half page rows to the other half page rows that are to be refreshed. Each of them can be implemented in a modern DRAM with less than 1.5% area overhead and when both schemes are used together, the total power consumption is reduced by 15% on average across various workload. This is equivalent to the power savings achieved by scaling the DRAM technology node from 20 nm to a 10 nm class [3]. Finally, we propose Smart Refresh to further reduce refresh energy with negligible area overheads by utilizing the retention time distribution of the cells. Reducing refresh energy becomes more important as DRAM technology scales and memory density increases. Our two refresh energy reduction schemes also work in self-refresh mode, where refresh energy consumption is even more significant.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2018; ©2018 |
| Publication date | 2018; 2018 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Ha, Heonjae |
|---|---|
| Degree supervisor | Horowitz, Mark (Mark Alan) |
| Thesis advisor | Horowitz, Mark (Mark Alan) |
| Thesis advisor | Kozyrakis, Christoforos, 1974- |
| Thesis advisor | Wong, S |
| Degree committee member | Kozyrakis, Christoforos, 1974- |
| Degree committee member | Wong, S |
| Associated with | Stanford University, Department of Electrical Engineering. |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Heonjae Ha. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis Ph.D. Stanford University 2018. |
| Location | electronic resource |
Access conditions
- Copyright
- © 2018 by Heonjae Ha
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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