Zirconium-doped hafnium oxide based ferroelectric materials for memory applications
Abstract/Contents
- Abstract
- As data processing and storage needs continue to grow at a rapid pace, the development of innovative memory technologies is crucial. The discovery of ferroelectricity in hafnia (HfO2)-based materials has garnered significant attention in both academia and industry, owing to their potential to revolutionize non-volatile memory (NVM) technology and enable novel computing architectures. HfO2-based ferroelectric materials offer advantages over conventional perovskite oxides, such as low-temperature synthesis and conformal growth in three-dimensional structures on silicon, making them compatible with complementary metal-oxide-semiconductor (CMOS) technology and ideal for device scaling. However, several challenges still exist for implementing ferroelectric HfO2 in commercial products, such as polarization variation during cycling (wake-up effect), high operation voltage, compatibility with back-end-of-line (BEOL) processing temperatures, and low memory density. In this dissertation, I tackled the challenges outlined above. I began by focusing on the Hf0.5Zr0.5O2 (HZO) material itself and addressing the wake-up effect through the introduction of an HfO2 buffer layer at the HZO/electrode interface. Subsequently, I developed a new measurement setup capable of directly measuring individual nm-sized devices, which enabled investigating the scaling effect in HZO-based ferroelectric capacitors. Through my research, I was able to demonstrate excellent ferroelectricity and reliability in ultra-thin HZO (4 nm) capacitors with molybdenum (Mo) electrodes. These capacitors exhibited low operation voltage, wake-up-free behavior, high endurance, and low RTA temperatures, making them highly desirable for practical applications. I also studied the size scaling effect down to 65 nm × 45 nm devices, where I observed ultra-high remanent polarization (2Pr) for the first time at this scale. In addition to exploring two-dimensional scaling to improve density, I also proposed a hybrid structure for 4 bits/cell storage, increasing the multi-bit capability in a single cell.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2023; ©2023 |
| Publication date | 2023; 2023 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Huang, Fei, (Researcher in electrical engineering) |
|---|---|
| Degree supervisor | Wong, S. Simon |
| Thesis advisor | Wong, S. Simon |
| Thesis advisor | McIntyre, Paul Cameron |
| Thesis advisor | Wong, Hon-Sum Philip, 1959- |
| Degree committee member | McIntyre, Paul Cameron |
| Degree committee member | Wong, Hon-Sum Philip, 1959- |
| Associated with | Stanford University, School of Engineering |
| Associated with | Stanford University, Department of Electrical Engineering |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Fei Huang. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis Ph.D. Stanford University 2023. |
| Location | https://purl.stanford.edu/xf591sb3621 |
Access conditions
- Copyright
- © 2023 by Fei Huang
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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