Background calibration of timing skew in time-interleaved A/D converters

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Abstract/Contents

Abstract
The increasing data rate of wireline communication systems leads to more inter-symbol interference, due to the dispersive properties of the communication channel. This requires more complex equalization blocks to meet the required bit-error rate. One solution is to use an Analog-to-Digital Converter (ADC) in the front-end, thus enabling a digitally-equalized serial link. To achieve the high-data rates of these communication systems, a time-interleaved ADC is typically used. However, this type of ADC suffers from several time-varying errors, the most prominent of which is timing skew. This thesis introduces a statistics-based background calibration algorithm that compensates for the effect of timing skew. To demonstrate the background calibration algorithm, a proof-of-concept 5 bit 12 GS/s flash ADC has been fabricated in a 65 nm CMOS process. The design of this ADC takes into consideration the tight power bounds imposed on serial links by optimizing both the time-interleaved and the sub-ADC architecture. Power consumption is further reduced by using calibration circuits to correct the offset of the flash ADC's comparators. In the measured results, the timing skew correction improves the dynamic performance of the time-interleaved ADC by 12 dB, and the proof-of-concept ADC has the lowest published power consumption for ADCs with sample rates higher than 10 GS/s.

Description

Type of resource text
Form electronic; electronic resource; remote
Extent 1 online resource.
Publication date 2010
Issuance monographic
Language English

Creators/Contributors

Associated with El-Chammas, Manar Ibrahim
Associated with Stanford University, Department of Electrical Engineering
Primary advisor Murmann, Boris
Thesis advisor Murmann, Boris
Thesis advisor Meng, Teresa H
Thesis advisor Wooley, Bruce A, 1943-
Advisor Meng, Teresa H
Advisor Wooley, Bruce A, 1943-

Subjects

Genre Theses

Bibliographic information

Statement of responsibility Manar Ibrahim El-Chammas.
Note Submitted to the Department of Electrical Engineering.
Thesis Thesis (Ph.D.)--Stanford University, 2010.
Location electronic resource

Access conditions

Copyright
© 2010 by Manar Ibrahim El-Chammas
License
This work is licensed under a Creative Commons Attribution Non Commercial No Derivatives 3.0 Unported license (CC BY-NC-ND).

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