Subthreshold analog circuit design for large-scale, low-power, spiking neuromorphic systems
Abstract/Contents
- Abstract
- Subthreshold current-mode circuits are attractive for low-power, large-scale neuromorphic systems due to their compact design and extremely small operating currents. I first discuss Neurogrid, such a large-scale system that I worked on, and its various components in Part I. One of the major issues that was not completely addressed in Neurogrid's design was these circuits' exponential sensitivity to ambient temperature and threshold-voltage mismatch. The lesson learned from Neurogrid was that, to properly design large-scale systems with such circuits, we need to model their sensitivity as well as the overall system's sensitivity. The former requires a statistical device model and the latter requires a statistical circuit model. While it is possible to study system-level behavior by performing detailed Monte-Carlo SPICE simulations of the analog circuits, this is computationally extremely expensive and difficult to scale. So, in order to ease designing large-scale systems, I developed a compact device model that captures the effect of drain-current mismatch and temperature variations in the subthreshold regime. I applied this device model to study current mirror and Soma circuits, representative examples of linear and nonlinear circuits. Using insights gleaned from these analyses, I designed various circuits for Braindrop, another mixed-analog-digital neuromorphic chip. I discuss the device model, circuit analysis techniques and the various analog circuits used in Braindrop in Part II.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2018; ©2018 |
| Publication date | 2018; 2018 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Benjamin Pottayil, Ben Varkey |
|---|---|
| Degree supervisor | Boahen, Kwabena (Kwabena Adu) |
| Thesis advisor | Boahen, Kwabena (Kwabena Adu) |
| Thesis advisor | Murmann, Boris |
| Thesis advisor | Wong, Hon-Sum Philip, 1959- |
| Degree committee member | Murmann, Boris |
| Degree committee member | Wong, Hon-Sum Philip, 1959- |
| Associated with | Stanford University, Department of Electrical Engineering. |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Ben Varkey Benjamin Pottayil. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis Ph.D. Stanford University 2018. |
| Location | electronic resource |
Access conditions
- Copyright
- © 2018 by Ben Varkey Benjamin Pottayil
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