Programming heterogeneous systems from an image processing domain specific language

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Abstract/Contents

Abstract
The performance and energy efficiency of image processing tasks are becoming increasingly important as cameras become ubiquitous, and as our ability to extract information from images improves. These tasks are extremely computationally intensive, requiring trillions of operations per second to fulfill the performance requirements of applications in computer vision, computational photography, and augmented reality. Therefore, specialized hardware accelerators are necessary to deliver the performance and energy efficiency required by these important applications. However, creating, "programming, '' and integrating this hardware into a hardware/software system is difficult. We address this problem by extending the image processing language, Halide, so users can specify which portions of their applications should become hardware accelerators, and then provide a compiler that uses this code to automatically create the accelerator along with the "glue" code needed for the user's application to access this hardware. Starting with Halide not only provides a very high-level functional description of the hardware, but also allows our compiler to generate a complete software application, which accesses the hardware for acceleration when appropriate. This system also provides high-level semantics to explore different mappings of applications to a heterogeneous system, including the flexibility of being able to change the throughput rate of the generated hardware. We demonstrate our approach by mapping applications to a commercial Xilinx Zynq system. Using its FPGA with two low-power ARM cores, our design achieves up to 6x higher performance and 38x lower energy compared to the quad-core ARM CPU on an NVIDIA Tegra K1, and 3.5x higher performance with 12x lower energy compared to the K1's 192-core GPU.

Description

Type of resource text
Form electronic; electronic resource; remote
Extent 1 online resource.
Publication date 2017
Issuance monographic
Language English

Creators/Contributors

Associated with Pu, Jing
Associated with Stanford University, Department of Electrical Engineering.
Primary advisor Horowitz, Mark
Thesis advisor Horowitz, Mark
Thesis advisor Hanrahan, P. M. (Patrick Matthew)
Thesis advisor Olukotun, Oyekunle Ayinde
Advisor Hanrahan, P. M. (Patrick Matthew)
Advisor Olukotun, Oyekunle Ayinde

Subjects

Genre Theses

Bibliographic information

Statement of responsibility Jing Pu.
Note Submitted to the Department of Electrical Engineering.
Thesis Thesis (Ph.D.)--Stanford University, 2017.
Location electronic resource

Access conditions

Copyright
© 2017 by Jing Pu
License
This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).

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