Building secure ICs - design and manufacturing

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Abstract/Contents

Abstract
The security of computer systems has generally been regarded as a software problem. However, as the Internet of Things (IoT) and autonomous driving vehicles become reality, the need for securing hardware systems has become equally critical. In particular, security and trust have become a prime concern for integrated circuit (IC) manufacturers in recent years. This includes security risks in all phases of supply chain including design, manufacturing, testing and after deployment. This dissertation presents comprehensive assessment of and key countermeasures against risk factors involved in IC design and manufacturing from the IC designers' and end-users' perspective. The first chapter of this dissertation will describe the unique nature of modern IC supply chain and where the security threats lie. In following chapter, different IC platforms are analyzed from the security perspective and the benefits of field-programmable gate array (FPGAs) will be highlighted in that regard. This dissertation presents a new IC manufacturing logistic, split manufacturing as a countermeasure to an attack from the third party manufacturer. Detailed analysis on split manufacturing process and the test results from split manufacturing that we performed under the Intelligence Advanced Research Projects Activity (IARPA) Trusted IC (TIC) program will be presented along with the projections for the future development. A run-time monitoring technique for an attack after fabrication will be also presented. The last chapter of this dissertation presents a new solution that avoid denial-of-service (DoS) after an attack. With a FPGA as a secure IC platform, its regular structure and built-in re-configurability are illustrated to thwart attack. A FPGA architecture with column-based redundancy that significantly enhances reliability and security of IC is presented with the results from test chips fabricated in 28nm technology.

Description

Type of resource text
Form electronic; electronic resource; remote
Extent 1 online resource.
Publication date 2016
Issuance monographic
Language English

Creators/Contributors

Associated with Lee, Kibum
Associated with Stanford University, Department of Electrical Engineering.
Primary advisor Wong, S
Thesis advisor Wong, S
Thesis advisor Poon, Ada Shuk Yan
Thesis advisor Wong, Hon-Sum Philip, 1959-
Advisor Poon, Ada Shuk Yan
Advisor Wong, Hon-Sum Philip, 1959-

Subjects

Genre Theses

Bibliographic information

Statement of responsibility Kibum Lee.
Note Submitted to the Department of Electrical Engineering.
Thesis Thesis (Ph.D.)--Stanford University, 2016.
Location electronic resource

Access conditions

Copyright
© 2016 by Kibum Lee
License
This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).

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