Fixture : a tool for automated modeling of mixed-signal systems

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Functional modeling of analog circuits is an important step in the verification of today's mixed-signal Systems-On-Chip, and it will only become more important as analog-digital interaction becomes more common. The Verilog functional models must be written by a skilled engineer, but there is significant repeated code between models for similar circuits. Some tools have been created to automate this repeated work including the DaVE toolset which uses a library of templates to organize analysis and modeling strategies for different types of analog circuit, automating the entire spice-to-Verilog flow for many circuits. This thesis seeks to extend the functionality of the DaVE toolset and create a new open-source analog circuit analysis tool called Fixture. Fixture is able to characterize a wider variety of user circuits than DaVE, and users can combine these new analysis templates with the existing model templates in DaVE to automate the flow from spice netlist to Verilog functional model. The features we added with Fixture were motivated by our attempts to model real-world circuits using DaVE and the issues we encountered with certain user circuits. Rather than make individual fixes for each circuit we worked to generalize the fixes so they could apply to a wide variety of user circuits and a wide variety of circuit types across the template library. This led to improvements with modeling nonlinear circuits, managing model complexity, and debugging user inputs, among many others. In addition to making user-facing improvements, we also gave Fixture a modular design so that any user can contribute to the open-source repository with new templates and tests. This thesis will walk through the features of Fixture and explain both how and why Fixture operates the way it does, covering many aspects of the tool. We make the process of template creation easier for engineers by organizing templates into tests. For each test, the engineer only needs to write the details specific to that test while Fixture automates general tasks like choosing sample points, performing regression, and plotting results. We use the fault library to allow templates to have a single testbench for both spice and Verilog circuits. Additionally, this allows Fixture to augment handwritten testbenches to add stimuli for additional inputs that modify circuit behavior, change the domain for an input or output signal, or convert a testbench for a single-ended circuit into one for a differential circuit. After collecting data, Fixture automatically solves a nonlinear optimization problem to fit coefficients in an equation provided by the template writer. The template writer can also supply multiple equations to give the user freedom in the tradeoff between accuracy and speed in the final model. In addition, the owner of the circuit being modeled has precise control over the way various inputs affect parameters of the equation, including the ability to specify arbitrary nonlinear relationships with their own coefficients to be fit to the data. Fixture intelligently chooses sample points to use in circuit simulation to accurately fit these coefficients while reducing simulation time. Finally, Fixture uses these same sample points to produce plots of various circuit parameters to allow engineers to quickly verify circuit performance or debug any issues. These improvements over previous automated modeling tools have allowed us to create models for real-world circuits that could previously only be modeled by hand. We hope that as new engineers use the tool, the library will become more robust and more useful. Fixture can be found at


Type of resource text
Form electronic resource; remote; computer; online resource
Extent 1 online resource.
Place California
Place [Stanford, California]
Publisher [Stanford University]
Copyright date 2023; ©2023
Publication date 2023; 2023
Issuance monographic
Language English


Author Stanley, Daniel, (Researcher in electrical engineering)
Degree supervisor Horowitz, Mark (Mark Alan)
Thesis advisor Horowitz, Mark (Mark Alan)
Thesis advisor Murmann, Boris
Thesis advisor Raina, Priyanka, (Assistant Professor of Electrical Engineering)
Degree committee member Murmann, Boris
Degree committee member Raina, Priyanka, (Assistant Professor of Electrical Engineering)
Associated with Stanford University, School of Engineering
Associated with Stanford University, Department of Electrical Engineering


Genre Theses
Genre Text

Bibliographic information

Statement of responsibility Daniel Stanley.
Note Submitted to the Department of Electrical Engineering.
Thesis Thesis Ph.D. Stanford University 2023.

Access conditions

© 2023 by Daniel Stanley
This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).

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