Techniques for mapping deep neural network frameworks to programmable accelerators
Abstract/Contents
- Abstract
- The trend towards increasing specialization in DNN accelerators is first discussed, as well as why FPGA hardware is sometimes selected. The two major ways that DNN applications can be automatically mapped to FPGAs are then reviewed: (1) mapping to manually-optimized template designs or overlay architectures, which is suited to DNN frameworks as a mapping source, and (2) mapping by compiling automatically-designed hardware. Next, an open-source, end-to-end toolchain to map TensorFlow DNNs to cloud FPGAs is described, which is the first open-source toolchain to use a modern DNN framework as a starting point and either (1) target public cloud FPGA hardware or (2) compile DNNs reaching state-of-the-art accuracy on an FPGA (cloud or not). This compiler is used to explore tradeoffs in DNN to FPGA mapping, including tensor storage format and architecture specialization, and to examine how different layer dimensions and other characteristics, such as locality, affect design decisions. Next, optimizations to improve circuits automatically designed by hardware compilation tools and DSLs are investigated. An algorithm for high-level hardware compilers is presented which reduces resource utilization for on-chip memory accesses common in DNNs and computer vision. Its applicability to general dense access patterns and applications is also demonstrated. For each of these observations, generalization is made beyond DNN or ML domains, and examples are shown where increasing specialization or heterogeneity in storage formats, processor architecture and on-chip data structures can improve FPGA accelerator resource utilization, timing closure and bandwidth requirements.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2021; ©2021 |
| Publication date | 2021; 2021 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Hadjis, Stefan |
|---|---|
| Degree supervisor | Olukotun, Oyekunle Ayinde |
| Thesis advisor | Olukotun, Oyekunle Ayinde |
| Thesis advisor | Fatahalian, Kayvon |
| Thesis advisor | Mitra, Subhasish |
| Degree committee member | Fatahalian, Kayvon |
| Degree committee member | Mitra, Subhasish |
| Associated with | Stanford University, Computer Science Department |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Stefan Hadjis. |
|---|---|
| Note | Submitted to the Computer Science Department. |
| Thesis | Thesis Ph.D. Stanford University 2021. |
| Location | https://purl.stanford.edu/ns754ym5385 |
Access conditions
- Copyright
- © 2021 by Stefan Hadjis
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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