Etching techniques to enable device fabrication of single-crystal thin silicon
Abstract/Contents
- Abstract
- The unique material properties and relative abundance of silicon has made it the element most responsible for the technological revolution that has occurred in the past several decades. Wafers of silicon, anywhere from 150 um to 900 um thick, are the primary substrates used in the fabrication of electronic devices such as computer processors, CCD image sensors, and photovoltaic solar cells. Research has been done to investigate the benefits and challenges of using drastically thinner Si wafers, down to the range of 2 um to 30 um. My PhD study focused on efforts into enabling device fabrication of single-crystal thin Si, specifically by means of certain etching techniques. In the first chapter of this dissertation, I will give a brief introduction of the current thin silicon work and explain why single-crystal silicon is the best choice for current and future electronic device needs. In the second chapter, I will detail my work with metal-assisted chemical etching (MACE) of silicon, a type of anisotropic etch technique that was discovered less than 20 years ago. I explored the prospect of producing a very deep, high-aspect ratio slice into silicon for application in the wafering process. I quickly learned that MACE needed more fundamental understanding to utilize properly in the manner that I wanted. Because of this, I investigated the basic mechanism of gold MACE on silicon and how it depended on factors like dopant type, dopant concentration, crystallographic direction, and etching solution composition. I will discuss various applications of this MACE technique for the structuring of the silicon surface. In the third chapter, I will detail my work with direct fabrication of thin Si using a process developed previously in our lab and improved upon here. A hot solution of potassium hydroxide (KOH) is used to etch a silicon wafer down until only a very thin membrane is suspended in the middle of a thicker handling ring. Multiple improvements were made to this technique, including the use of tetramethylammonium hydroxide (TMAH), which is directly CMOS-compatible. In the fourth chapter, I will discuss and show how I successfully fabricated working electronic devices on the thin Si handling ring structure, on not only one side but both sides of the thin Si. I will detail the challenges encountered, and solutions found, along the way, as well as the characterization of the devices fabricated. I will also briefly address potential new applications that are enabled by this type of fabrication.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2018; ©2018 |
| Publication date | 2018; 2018 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Hymel, Thomas |
|---|---|
| Degree supervisor | Cui, Yi, 1976- |
| Thesis advisor | Cui, Yi, 1976- |
| Thesis advisor | Chueh, William |
| Thesis advisor | Dionne, Jennifer Anne |
| Degree committee member | Chueh, William |
| Degree committee member | Dionne, Jennifer Anne |
| Associated with | Stanford University, Department of Materials Science and Engineering. |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Thomas Hymel. |
|---|---|
| Note | Submitted to the Department of Materials Science and Engineering. |
| Thesis | Thesis Ph.D. Stanford University 2018. |
| Location | electronic resource |
Access conditions
- Copyright
- © 2018 by Thomas Michael Hymel
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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