Layout automation for analog and mixed-signal circuits using digital place-and-route tools
Abstract/Contents
- Abstract
- Today's analog and mixed-signal (AMS) layout flow requires long manual iterations and does not leverage computing resources for data-driven optimization. This issue is further compounded by the explosion of design rules and layout-dependent effects. We present an AMS layout generation flow that leverages digital place-and-route tools, amortizes setup cost with reusable primitives, and prunes layout candidates using time-efficient layout quality surrogates. We also analyze layout-dependent effects and parasitics and investigate unique challenges and mitigation strategies associated with using digital place-and-route tools for AMS circuits. These insights are validated with a generated 4x time-interleaved successive approximation analog-to-digital converter, a StrongARM comparator, and a voltage-controlled oscillator (VCO) in 16 nm FinFET CMOS. Silicon measurement results of the VCO closely track the simulation, showing only 6% in maximal oscillation frequency degradation from its manual counterpart, verifying the methodology from netlist to silicon.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2021; ©2021 |
| Publication date | 2021; 2021 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Wei, Po-Hsuan |
|---|---|
| Degree supervisor | Murmann, Boris |
| Thesis advisor | Murmann, Boris |
| Thesis advisor | Horowitz, Mark (Mark Alan) |
| Thesis advisor | Lee, Thomas H, 1959- |
| Degree committee member | Horowitz, Mark (Mark Alan) |
| Degree committee member | Lee, Thomas H, 1959- |
| Associated with | Stanford University, Department of Electrical Engineering |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Po-Hsuan Wei. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis Ph.D. Stanford University 2021. |
| Location | https://purl.stanford.edu/mv779vk8233 |
Access conditions
- Copyright
- © 2021 by Po-Hsuan Wei
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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