Approaching the limits of low resistance contacts to n-type germanium
Abstract/Contents
- Abstract
- For over half a century, we have witnessed an incredible increase in the performance of digital electronics by virtue of Moore's Law. This improvement has largely been powered by aggressive scaling of silicon (Si) transistor technology. However, as device dimensions continue to be reduced to smaller dimensions, Si may be reaching its limits as a high-performance channel material. Germanium (Ge) is a promising candidate to augment or replace Si due to its high electron and hole mobilities, and its compatibility with existing Si process technology. High-performance Ge PMOS transistors have been demonstrated, but NMOS lags behind due to the difficulty in making low resistance contacts to n-type Ge. In this work, I investigate the factors limiting the contact resistance and explore techniques to reduce the electron Schottky barrier height and increase n-type dopant activation in order to achieve low resistance contacts to n-type Ge. First, I investigate the use of metal-interlayer-semiconductor (MIS) contacts to alleviate the strong Fermi level pinning on Ge. I experimentally determine the pinning properties of zinc oxide (ZnO) through electrical measurements and show that it is a suitable choice for the interlayer material. Fabrication of ZnO MIS contacts, however, reveals some practical limitations, including a high tunneling resistance and reaction at the metal-ZnO interface. I demonstrate that interlayer doping can be used to overcome these issues and effectively reduce contact resistance. Next, I introduce differential Hall effect metrology (DHEM) as a technique to accurately measure high-resolution electrically-active carrier concentration depth profiles. Using this technique, I demonstrate the first measurement of a large decrease in electron concentration within 10 nm of the surface for Ge ion-implanted with both a single phosphorus (P) implant and with antimony (Sb) and P co-doping. These measurements indicate that ion implant damage causes severe near-surface dopant deactivation. Finally, I present a thorough investigation into the effects of various process parameters on contact resistance to n-type Ge. I show that removal of Ge native oxide (GeOx), nickel germanide (NiGe) formation, and co-doping can improve contact resistance but are ultimately not enough. Finally, I demonstrate that low temperature nonthermal equilibrium molecular beam epitaxy (MBE) of Ge with in-situ Sb doping can be used to realize heavy n-type electrically-active doping. I fabricate nickel (Ni) contacts on this substrate to achieve an ultra-low specific contact resistivity which is among the lowest reported values to date for contacts to n-type Ge. This work demonstrates that low resistance contacts to n-type Ge can be achieved and provides a pathway towards the realization of Ge NMOS technology.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2021; ©2021 |
| Publication date | 2021; 2021 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Ramesh, Pranav |
|---|---|
| Degree supervisor | Saraswat, Krishna |
| Thesis advisor | Saraswat, Krishna |
| Thesis advisor | Fan, Jonathan Albert |
| Thesis advisor | Pop, Eric |
| Degree committee member | Fan, Jonathan Albert |
| Degree committee member | Pop, Eric |
| Associated with | Stanford University, Department of Electrical Engineering |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Pranav Ramesh. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis Ph.D. Stanford University 2021. |
| Location | https://purl.stanford.edu/mf756gh2541 |
Access conditions
- Copyright
- © 2021 by Pranav Ramesh
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