Resistive random access memory device scaling and integration with complementary metal-oxide-semiconductor

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Abstract/Contents

Abstract
Resistive random access memory (RRAM) is a promising candidate to meet future density and power challenges. RRAM has fast switching speed, low programming power, and many other advantages. However, there are still a few imperative issues to be tackled before RRAM can compete with, and eventually, replace flash or other memory technologies. This dissertation explores two issues: 1) RRAM scaling potential below 10 nm and 2) integration of RRAM with complementary metal-oxide-semiconductor (CMOS), which leads to the first threedimensional (3D) field programmable gate array (FPGA) based on RRAM.

Description

Type of resource text
Form electronic; electronic resource; remote
Extent 1 online resource.
Publication date 2013
Issuance monographic
Language English

Creators/Contributors

Associated with Zhang, Zhiping
Associated with Stanford University, Department of Electrical Engineering.
Primary advisor Wong, S. Simon
Thesis advisor Wong, S. Simon
Thesis advisor Nishi, Yoshio, 1940-
Thesis advisor Wong, Hon-Sum Philip, 1959-
Advisor Nishi, Yoshio, 1940-
Advisor Wong, Hon-Sum Philip, 1959-

Subjects

Genre Theses

Bibliographic information

Statement of responsibility Zhiping Zhang.
Note Submitted to the Department of Electrical Engineering.
Thesis Thesis (Ph.D.)--Stanford University, 2013.
Location electronic resource

Access conditions

Copyright
© 2013 by Zhiping Zhang
License
This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).

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