Towards irregular computation on regular dataflow
Abstract/Contents
- Abstract
- This thesis presents my work on expanding the bounds of programmability for vectorized reconfigurable dataflow accelerators (vRDAs). vRDAs, including Plasticine and the SambaNova RDU, promise users more efficient computation by eliminating the overheads of modern von Neumann machines—instruction fetch, dynamic scheduling, speculation, and caching. Instead of fetching instructions from a cache and data from a register file and then executing code in a single physical location, vRDAs lay out computation across an entire chip. Each instruction is mapped to a pipeline stage, and data flows through those stages. Similarly, instead of coordinating memory transfers through a cache hierarchy (with the overhead of prefetching and reordering), vRDAs use explicitly coordinated scratchpads to provide low-overhead, high-throughput on-chip accesses. However, to practically use a vRDA, applications must be compiled from a high-level language, and previously only dense linear algebra could be compiled to Plasticine using the MapReduce programming model as implemented in Spatial. This programming model limited applications to counter-based iteration with affine memory accesses and prevented control flow within the innermost parallel region. I overcome these limitations via Capstan and Revet. First, Capstan uses new hardware to introduce support for direct iteration on a variety of sparse tensor formats, including sparse-dense and sparse-sparse iteration. Then, Revet builds on Capstan and Aurochs to support inner-loop control flow by compiling an imperative language to dataflow using a streaming, embedded-control tensor format. For vRDAs, Capstan and Revet both provide zero-to-one improvements: they enable applications that could not previously be mapped. They are 4.3x smaller than an Nvidia V100 GPU, 17x faster for sparse applications, and 3.8x faster for applications with inner-loop control flow.
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource. |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2022; ©2022 |
| Publication date | 2022; 2023 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Rucker, Alexander Carlton |
|---|---|
| Degree supervisor | Olukotun, Oyekunle Ayinde |
| Thesis advisor | Olukotun, Oyekunle Ayinde |
| Thesis advisor | Kjoelstad, Fredrik |
| Thesis advisor | Raina, Priyanka, (Assistant Professor of Electrical Engineering) |
| Degree committee member | Kjoelstad, Fredrik |
| Degree committee member | Raina, Priyanka, (Assistant Professor of Electrical Engineering) |
| Associated with | Stanford University, Department of Electrical Engineering |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Alexander C. Rucker. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis Ph.D. Stanford University 2023. |
| Location | https://purl.stanford.edu/kk999wj8677 |
Access conditions
- Copyright
- © 2022 by Alexander Carlton Rucker
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