Improving the reliability and performance of impact-ionization based transistors for low power logic applications
Abstract/Contents
- Abstract
- Standby power dissipation is becoming an increasingly significant problem for integrated circuits due to the non-scaling behavior of the transistor leakage currents. Underlying this problem is the concept of subthreshold slope (S), which is a measure of switching abruptness in transistors. For MOSFETs, S is fundamentally limited at 60 mV/decade by the drift-diffusion based transport. This leads to an exponential increase in the off-state leakage with feature size scaling. This thesis starts with an overview of several innovative device concepts that have demonstrated proof of S < 60 mV/decade operation. Among these novel devices, Impact-Ionization MOS (IMOS) transistor is highlighted as an attractive candidate, due to its all-electrical operation and extremely abrupt switching behavior. The major obstacles before IMOS are identified to be poor reliability and high operating voltage. Subsequent chapters are devoted to a through study of IMOS reliability. Experimental and simulation-based characterization of the device points to several structural problems that lead to severe hot carrier induced damage and poor repeatability. In order to address these problems, a novel device structure called depletion IMOS (DIMOS) is proposed. DIMOS operating principles and electrical characteristics are studied via simulations and experiments. Experimental results of the DIMOS show suppression of hot carrier injection into the gate and feature repeatable steep subthreshold slope switching for the first time. This work concludes with a discussion of circuit design issues surrounding IMOS and DIMOS devices.
Description
| Type of resource | text |
|---|---|
| Form | electronic; electronic resource; remote |
| Extent | 1 online resource. |
| Publication date | 2010 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Associated with | Onal, Caner |
|---|---|
| Associated with | Stanford University, Department of Electrical Engineering. |
| Primary advisor | Plummer, J |
| Thesis advisor | Plummer, J |
| Thesis advisor | Griffin, Peter B |
| Thesis advisor | Wong, Hon-Sum Philip, 1959- |
| Advisor | Griffin, Peter B |
| Advisor | Wong, Hon-Sum Philip, 1959- |
Subjects
| Genre | Theses |
|---|
Bibliographic information
| Statement of responsibility | Caner Onal. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis (Ph. D.)--Stanford University, 2010. |
| Location | electronic resource |
Access conditions
- Copyright
- © 2010 by Caner Onal
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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