A scalable all-digital 64x48 pixel flash LiDaR image sensor
Abstract/Contents
- Abstract
- In recent decades, there has been an increasing interest in development of depth-sensing systems with a wide range of applications including autonomous driving cars, computer vision, motion-detection and object recognition. One class of such depth-sensors is known as Time-of-Flight (ToF) LiDaR, which estimates the distance of an object by illuminating it with a laser beam, and measuring the time of flight of the reflected light. There are two methods with which LiDaR systems generate a full 3D image of a scene. Most systems used today are Scanning LiDaRs. These devices illuminate a scene sequentially and mostly use mechanical motion to move the beam. The Flash architecture removes the need for beam motion by illuminating an entire scene at once. This thesis explores the design space for a Flash LiDaR detector. Starting with the Poisson process, we derive the probability of photon detections as a function of time. The distribution, which includes the contributions of background and laser light sources, can best be described as a mixture exponential distribution that is used to build multi-exposure histograms under different conditions. Using the aforementioned procedure, we developed a simulator to analyze measurement uncertainty as a function of parameters such as photon flux, SNR, number of exposures, and object distance. An exponential weighting function which scales the histogram is then shown to improve recovery of distant objects. Finally, we provide an overview of the Flash LiDaR ICs and the issues associated with such designs comprising collisions, detection-rate, and timing accuracy. As photon detections are inherently asynchronous events, we use a classical circuit technique, self-resetting logic, to eliminate collisions and reliably increase the detection rates. We also use array-partitioning techniques to scale the design to large-scale arrays while maintaining high-performance and reliability. The Time-to-Digital Converter (TDC) circuits which timestamp photon arrivals use digitally-assisted free-running oscillators to decrease complexity, precluding the need to distribute high-frequency clocks or replica biasing. As a result, the design uses a single low-frequency external clock-source (< 500MHz) which simplifies clock routing and reduces clock-distribution timing uncertainty
Description
| Type of resource | text |
|---|---|
| Form | electronic resource; remote; computer; online resource |
| Extent | 1 online resource |
| Place | California |
| Place | [Stanford, California] |
| Publisher | [Stanford University] |
| Copyright date | 2020; ©2020 |
| Publication date | 2020; 2020 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Author | Partovi, Hamid |
|---|---|
| Degree supervisor | Horowitz, Mark (Mark Alan) |
| Thesis advisor | Horowitz, Mark (Mark Alan) |
| Thesis advisor | Arbabian, Amin |
| Thesis advisor | Wetzstein, Gordon |
| Degree committee member | Arbabian, Amin |
| Degree committee member | Wetzstein, Gordon |
| Associated with | Stanford University, Department of Electrical Engineering |
Subjects
| Genre | Theses |
|---|---|
| Genre | Text |
Bibliographic information
| Statement of responsibility | Hamid Partovi |
|---|---|
| Note | Submitted to the Department of Electrical Engineering |
| Thesis | Thesis Ph.D. Stanford University 2020 |
| Location | electronic resource |
Access conditions
- Copyright
- © 2020 by Hamid Partovi
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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