An open-source framework for FPGA emulation of analog/mixed-signal integrated circuit designs

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Abstract/Contents

Abstract
FPGA emulation is widely used to speed up simulations of digital chip designs, but the technique is difficult to extend to analog/mixed-signal (AMS) designs because they contain blocks that cannot be directly mapped to an FPGA's programmable logic. This necessitates the creation of synthesizable models for AMS blocks, a process that is time-consuming, error-prone, and expensive, as it requires a rare combination of expertise: analog modeling and FPGA implementation. Furthermore, fast AMS simulation techniques do not always work well on an FPGA, and can limit the speedup that is possible through emulation. This thesis is about my efforts to unlock the potential of FPGA emulation for AMS designs by developing new high-performance AMS emulation techniques, along with an open-source framework that makes it easy to apply those techniques. The underlying premise is that AMS emulators should take large, but precise, timesteps corresponding to digital events, leveraging compile-time precomputation to make the FPGA implementation more efficient. "Analog-only" timesteps should be avoided, since their effect on emulator performance is more severe than in a CPU-based simulation. The open-source emulation framework has been applied to six commercial designs, as well as one academic design. I focus on three of those applications in this thesis: an ADC-based high-speed link design, a firmware-controlled flyback converter, and an NFC-powered chip. Across those applications, speedups as compared to existing CPU-based simulations ranged from 2-3 orders of magnitude, creating new opportunities for pre-silicon firmware development and RTL-level verification of slow feedback loops. My hope is that this freely available, high-performance framework will help to break through the verification bottleneck in modern AMS design.

Description

Type of resource text
Form electronic resource; remote; computer; online resource
Extent 1 online resource.
Place California
Place [Stanford, California]
Publisher [Stanford University]
Copyright date 2021; ©2021
Publication date 2021; 2021
Issuance monographic
Language English

Creators/Contributors

Author Herbst, Steven G
Degree supervisor Horowitz, Mark (Mark Alan)
Thesis advisor Horowitz, Mark (Mark Alan)
Thesis advisor Arbabian, Amin
Thesis advisor Hanrahan, P. M. (Patrick Matthew)
Degree committee member Arbabian, Amin
Degree committee member Hanrahan, P. M. (Patrick Matthew)
Associated with Stanford University, Department of Electrical Engineering

Subjects

Genre Theses
Genre Text

Bibliographic information

Statement of responsibility Steven Herbst.
Note Submitted to the Department of Electrical Engineering.
Thesis Thesis Ph.D. Stanford University 2021.
Location https://purl.stanford.edu/gj828vr5382

Access conditions

Copyright
© 2021 by Steven G Herbst
License
This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).

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