High-resolution SAR A/D converters with loop-embedded input buffer
Abstract/Contents
- Abstract
- Successive-approximation-register (SAR) analog-to-digital converters (ADCs) have generated a significant amount of interest in the past several years. While most of the recent literature focuses on low-to-moderate resolution designs (8-10 bits), we are now beginning to see significant advancements in the high-resolution space, targeting ≥14 bits at 10-100 MS/s. Traditionally, this performance range has been dominated by pipelined and delta-sigma architectures. However, several applications in high-speed control and interference cancellation require low laten-cy and this is where the SAR topology becomes attractive. While several SAR ADCs have demonstrated efficient digitization at high speed and resolution, the difficulty of driving a large sampling capacitor with high accuracy in a short sam-pling window is an important challenge in the System-on-a-Chip (SoC) integration of such ADCs that is often ignored in the literature. The work of this dissertation led to the design of a 14-bit 35 MS/s SAR ADC in 40 nm CMOS with a loop-embedded input buffer that consumes only 23% of the total ADC power. The buffer uses a source follower topology whose nonline-arities are cancelled by the SAR algorithm, allowing us to achieve 99 dB spurious-free dynamic range (SFDR) despite the small amount of invested power. That approach made it possible to reduce the input capacitance of the ADC by a factor of eighteen, easing the drive requirements substantially and resulting in the highest reported SFDR for SAR ADCs with a sampling speed greater than 20 MS/s. Additionally, a second SAR ADC design (30 MS/s) based on a noise filter gear-shifting concept is introduced. Using a comparator with time varying noise performance, this ADC achieves a state-of-the-art figure of merit (FOM) of 161.6 dB and a peak signal to noise-plus-distortion ratio (SNDR) of 77 dB, which is the highest reported value for SAR ADCs with a sampling frequency above 20 MHz.
Description
| Type of resource | text |
|---|---|
| Form | electronic; electronic resource; remote |
| Extent | 1 online resource. |
| Publication date | 2015 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Associated with | Kramer, Martin |
|---|---|
| Associated with | Stanford University, Department of Electrical Engineering. |
| Primary advisor | Murmann, Boris |
| Thesis advisor | Murmann, Boris |
| Thesis advisor | Lee, Thomas |
| Thesis advisor | Wooley, Bruce A, 1943- |
| Advisor | Lee, Thomas |
| Advisor | Wooley, Bruce A, 1943- |
Subjects
| Genre | Theses |
|---|
Bibliographic information
| Statement of responsibility | Martin Krämer. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis (Ph.D.)--Stanford University, 2015. |
| Location | electronic resource |
Access conditions
- Copyright
- © 2015 by Martin Johannes Kraemer
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
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