Hardware-efficient designs for quantum error correction

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Abstract/Contents

Abstract
Quantum error correction (QEC) protects the quantum information against various dissipation processes. The experimental implementation of QEC is still challenging, despite significant efforts and progress in recent years. For example, the standard qubit-based QEC requires a large overhead in the qubit counts with a high hardware complexity. In this dissertation, I will present three works towards more hardware-efficient realizations of QEC. First, I will talk about an experiment on the quantum parametric oscillator, where the generated cat states are potentially useful as bosonic qubits. Next, I will propose a Floquet qubit design in superconducting circuits that has a mechanical analog of Kapitza's pendulum. The qubit subspace is protected autonomously with an engineered cooling process. Finally, I will describe a numerical framework for automatically discovering autonomous QEC schemes.

Description

Type of resource text
Form electronic resource; remote; computer; online resource
Extent 1 online resource.
Place California
Place [Stanford, California]
Publisher [Stanford University]
Copyright date 2022; ©2022
Publication date 2022; 2022
Issuance monographic
Language English

Creators/Contributors

Author Wang, Zhaoyou
Degree supervisor Safavi-Naeini, Amir H
Thesis advisor Safavi-Naeini, Amir H
Thesis advisor Mabuchi, Hideo
Thesis advisor Schleier-Smith, Monika
Degree committee member Mabuchi, Hideo
Degree committee member Schleier-Smith, Monika
Associated with Stanford University, Department of Applied Physics

Subjects

Genre Theses
Genre Text

Bibliographic information

Statement of responsibility Zhaoyou Wang.
Note Submitted to the Department of Applied Physics.
Thesis Thesis Ph.D. Stanford University 2022.
Location https://purl.stanford.edu/cs964xk2965

Access conditions

Copyright
© 2022 by Zhaoyou Wang
License
This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).

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