Semiconductor crystal islands for three-dimensional integration

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Abstract/Contents

Abstract
The critical operation needed to achieve 3-dimensional integrated circuits (3DICs) is obtaining single-crystal, device-quality semiconductor material on upper circuit layers without damaging circuits below (400°C temperature limit). Simulation shows that microsecond pulse 532 nm Nd:YAG laser can melt and crystallize amorphous Si or Ge layers without excessively heating the circuit layers underneath. However, experimental results of unseeded (graphoepitaxy) and seeded (RMG) crystallization of Si and Ge indicate that much longer pulse lengths are required for high-quality single-crystal formation, rendering the approach not 3DIC compatible. A more straightforward approach is to directly attach high-quality crystal islands for upper-layer device fabrication. A variety of viable low-temperature ([less than or equal to]400°C) bonding methods have been investigated: fusion bonding (SiO2-SiO2, Si-SiO2, Ge-SiO2), thermo-compressive bonding (Cu-Cu, Ti-Ti), as well as Al-Ge eutectic bonding. The unique advantages of AlGe technique for 3DICs are reported for the first time. They include superior bond strength, low void density, non-stringent roughness requirement, use of thin films and CMOS friendly materials. Finally, we present a completed 3DIC compatible process of obtaining single crystal Si or Ge islands for upper layer device fabrication via SmartCut® and CMP finish.

Description

Type of resource text
Form electronic; electronic resource; remote
Extent 1 online resource.
Publication date 2010
Issuance monographic
Language English

Creators/Contributors

Associated with Crnogorac, Filip
Associated with Stanford University, Department of Electrical Engineering
Primary advisor Brongersma, Mark L
Primary advisor Pease, R. (R. Fabian W.)
Thesis advisor Brongersma, Mark L
Thesis advisor Pease, R. (R. Fabian W.)
Thesis advisor Kamins, Theodore I
Thesis advisor Nishi, Yoshio, 1940-
Advisor Kamins, Theodore I
Advisor Nishi, Yoshio, 1940-

Subjects

Genre Theses

Bibliographic information

Statement of responsibility Filip Crnogorac.
Note Submitted to the Department of Electrical Engineering.
Thesis Thesis (Ph. D.)--Stanford University, 2010.
Location electronic resource

Access conditions

Copyright
© 2010 by Filip Crnogorac
License
This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).

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