Interactive Circuit Debugging and Simulation with Just In Time Compilation
Abstract/Contents
- Abstract
- Hardware development is traditionally viewed as significantly more challenging and costly than software development, partly due to the relative difficulty of debugging and validating hardware when compared to software. This work aims to reduce these barriers by employing new hardware circuit simulation techniques to achieve user friendly and interactive debugging of hardware circuits similar to current software debugging solutions.
Description
Type of resource | text |
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Date created | January 2017 - June 2018 |
Creators/Contributors
Author | Shacklett, Brennan | |
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Advisor | Hanrahan, Pat | |
Degree granting institution | Stanford University, Department of Computer Science |
Subjects
Subject | Computer Science |
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Subject | Simulation |
Subject | Debugging |
Genre | Thesis |
Bibliographic information
Related item |
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Location | https://purl.stanford.edu/jn757wx9067 |
Access conditions
- Use and reproduction
- User agrees that, where applicable, content will not be used to identify or to otherwise infringe the privacy or confidentiality rights of individuals. Content distributed via the Stanford Digital Repository may be subject to additional license and use restrictions applied by the depositor.
- License
- This work is licensed under a Creative Commons Attribution Non Commercial 3.0 Unported license (CC BY-NC).
Preferred citation
- Preferred Citation
- Shacklett, Brennan. Interactive Circuit Debugging and Simulation with Just In Time Compilation. Stanford Digital Repository. Available at: https://purl.stanford.edu/jn757wx9067
Collection
Undergraduate Theses, School of Engineering
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- Contact
- bps@cs.stanford.edu
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