Verilog piecewise linear behavioral modeling for mixed-signal validation
Abstract/Contents
- Abstract
- Mixed-signal systems-on-chip (SoC's) are complex entities that contain very tightly coupled analog and digital circuits. Validating these complex systems requires simulating the entire design through a large number of test vectors, and each test vector might in turn lead to a long simulation. Due to traditionally differing views of validation as well as design tools for analog and digital, validation of an SoC is not easy. Behavioral modeling is an attractive approach that tries to address this issue by replacing analog circuits with high-level functional models to speed up simulation while retaining some of the analog behavior. This dissertation proposes a method for creating these models in an event-driven, digital modeling language. Piecewise linear approximation is used to represent continuous time analog signals as value-slope pairs that update at discrete instances in time. By breaking analog circuits into sub-blocks with mostly unidirectional ports and leveraging the (nearly) linear intent of analog circuits, an efficient method of computing module output that avoids time integration is possible. The overall result is analog behavioral models that are pin-accurate, fast to simulate and capture the key dynamics in analog circuits. Models of various types of circuits (a simple RC filter, a phase interpolator, a comparator and a current DAC) are used to illustrate the wide applicability of the proposed modeling method. A 250MS/s track and hold, a 2.5-1.8V switching regulator, and a 1GHz PLL are also modeled to verify the preservation of important circuit behaviors as well as to gauge these models' computation complexity.
Description
| Type of resource | text |
|---|---|
| Form | electronic; electronic resource; remote |
| Extent | 1 online resource. |
| Publication date | 2014 |
| Issuance | monographic |
| Language | English |
Creators/Contributors
| Associated with | Liao, Sabrina | |
|---|---|---|
| Associated with | Stanford University, Department of Electrical Engineering. | |
| Primary advisor | Horowitz, Mark (Mark Alan) | |
| Thesis advisor | Horowitz, Mark (Mark Alan) | |
| Thesis advisor | Murmann, Boris | |
| Thesis advisor | Wooley, Bruce A, 1943- | |
| Advisor | Murmann, Boris | |
| Advisor | Wooley, Bruce A, 1943- |
Subjects
| Genre | Theses |
|---|
Bibliographic information
| Statement of responsibility | Sabrina Liao. |
|---|---|
| Note | Submitted to the Department of Electrical Engineering. |
| Thesis | Thesis (Ph.D.)--Stanford University, 2014. |
| Location | electronic resource |
Access conditions
- Copyright
- © 2014 by Sabrina Liao
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